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 STP6NS25
N-CHANNEL 250V - 0.9 - 6A TO-220 MESH OVERLAYTM MOSFET
TYPE STP6NS25
s s s
VDSS 250 V
RDS(on) < 1.1
ID 6A
TYPICAL RDS(on) = 0.9 EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED
3 1 2
DESCRIPTION Using the latest high voltage MESH OVERLAYTM process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performance. The new patented STrip layout coupled with the Company's proprietary edge termination structure, makes it suitable in coverters for lighting applications.
TO-220
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING s SWITH MODE POWER SUPPLIES (SMPS) s DC-DC CONVERTERS FOR TELECOM, INDUSTRIAL, AND LIGHTING EQUIPMENT
s
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID ID IDM ( ) PTOT dv/dt (1) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuos) at TC = 25C Drain Current (continuos) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature Value 250 250 20 6 4 24 70 0.56 5 -65 to 150 150
(1) ISD 6A, di/dt300 A/s, VDD V(BR)DSS, TjTjMAX
Unit V V V A A A W W/C V/ns C C
(*)Pulse width limited by safe operating area
November 2002
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THERMAL DATA
Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose 1.79 62.5 300 C/W C/W C
AVALANCHE CHARACTERISTICS
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 C, ID = IAR, VDD = 50 V) Max Value 4 75 Unit A mJ
ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED) OFF
Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 20V Min. 250 1 50 100 Typ. Max. Unit V A A nA
ON (1)
Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS, ID = 250A VGS = 10V, ID = 2 A Min. 2 Typ. 3 0.9 Max. 4 1.1 Unit V
DYNAMIC
Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS > ID(on) x RDS(on)max, ID = 2A VDS = 25V, f = 1 MHz, VGS = 0 Min. 1 Typ. 3.5 355 64 30 Max. Unit S pF pF pF
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STP6NS25
ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON
Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 125 V, ID = 3 A RG = 4.7 VGS = 10 V (see test circuit, Figure 3) VDD = 200V, ID = 4 A, VGS = 10V Min. Typ. 12 18 19 3.2 7.5 27 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbol td(Voff) tf tr(Voff) tf tc Parameter Turn-off- Delay Time Fall Time Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 125V, ID = 2 A, RG = 4.7, VGS = 10V (see test circuit, Figure 3) Vclamp = 200V, ID = 4 A, RG = 4.7, VGS = 10V (see test circuit, Figure 5) Min. Typ. 70 10 13 10 21 Max. Unit ns ns ns ns ns
SOURCE DRAIN DIODE
Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 6 A, VGS = 0 ISD = 6 A, di/dt = 100A/s VDD = 30V, Tj = 150C (see test circuit, Figure 5) 124 0.5 7 Test Conditions Min. Typ. Max. 6 24 1.5 Unit A A V ns C A
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area.
Safe Operating Area
Thermal Impedance
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Output Characteristics Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
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Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
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STP6NS25
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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STP6NS25
TO-220 MECHANICAL DATA
DIM. MIN. A C D D1 E F F1 F2 G G1 H2 L2 L4 L5 L6 L7 L9 DIA. 13.0 2.65 15.25 6.2 3.5 3.75 0.49 0.61 1.14 1.14 4.95 2.4 10.0 16.4 14.0 2.95 15.75 6.6 3.93 3.85 0.511 0.104 0.600 0.244 0.137 0.147 4.40 1.23 2.40 1.27 0.70 0.88 1.70 1.70 5.15 2.7 10.40 0.019 0.024 0.044 0.044 0.194 0.094 0.393 0.645 0.551 0.116 0.620 0.260 0.154 0.151 mm TYP. MAX. 4.60 1.32 2.72 MIN. 0.173 0.048 0.094 0.050 0.027 0.034 0.067 0.067 0.203 0.106 0.409 inch TYP. MAX. 0.181 0.051 0.107
A
C
D1
L2
D
F1
G1
E
Dia. L5 L7 L6 L4
P011C
L9
F2
F
G
H2
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. (c) http://www.st.com
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